Tachyum's ‘Industry’s First Universal Processor’ Gets $25 Million in Funding

Credit: Aleksy / ShutterstockCredit: Aleksy / Shutterstock

Silicon start-up Tachyum has completed a Series-A funding round that has given it a $25 million war chest. The company unveiled its Prodigy Universal Processor family last year at Hot Chips and plans to tape out the chip this year with a launch in the second half of 2020. It claims the chips outperform CPUs, GPUs, and TPUs, all while still being programmable like a CPU and consuming 10x less power.Credit: TachyumCredit: Tachyum

Tachyum makes impressive claims for its Prodigy line-up that it claims are faster than Xeon and smaller than ARM chips. It claims higher IPC than the Skylake architecture (which is found in all of Intel’s Core chips since late 2015), and in a much smaller chip, too. Built on TSMC’s high-performance 7nm process, like AMD’s Zen 2 family, the 64-core die measures just 290mm2. For comparison, AMD’s Rome has eight 8-core chiplets of 74mm2 for 592mm2, and also a large accompanying I/O die, totaling over 1000mm2 of silicon real estate for the 64-core product.

Furthermore, the chip has 8-channel DDR5 support and 72 PCIe 5.0 lanes, it supports 2x 400G Ethernet and HBM3 is optional. The chip is a bit lacking on the cache front, though, with just 32MB of fully coherent L2/L3 cache, but that is understandable given its small die size. That shouldn’t take away from its performance: despite packing 64 cores, they should run at an impressive 4GHz frequency, even during HPC and AI workloads, with just 180W of power consumption. Like Skylake-SP and Cascade Lake-SP, Prodigy has two 512-bit vector (floating-point) units per core, twice the width of Zen 2.

To the initiated, these would seem like unbelievable claims. Tachyum gives a few more details of how it has managed to do this, though. It says data travels over very short wires, mitigating the “slow wires problem.” Its main feature, however, looks to be its out-of-order execution (one of the primary design elements of state-of-the-art CPU architectures) in software, done by the compiler in advance instead of at runtime. This makes the core small. This, we note, is a euphemism for a Very Long Instruction Word (VLIW) instruction set architecture, like Intel’s Itanium. We also note that Itanium has never reached much success, to use a euphemism too. In any case, existing applications will have to be recompiled.Credit: TachyumCredit: TachyumAll in all, Tachyum claims it has developed a ‘universal processor’ in a time when it is fashionable to accelerate everything with heterogeneous chips or chiplets. It purports it has 10x lower power and server foorprint, and 3x lower cost. Tachyum expects to bring its chip to market in the second half of 2020. It has also talked about the possibility of building an exascale system in 2020 with 250,000 of its Prodigy chips.