DDR3-1333 Speed and Latency Shootout

Boot Straps, I.e., Intel's

The next step in complete memory testing is to find a module’s highest performance settings at any given clock speed, by using its lowest stable latency values. This sounds simple enough but actually requires hours of stability testing on each module and at each speed to assure results are repeatable.

Most of the modules we tested were able to reach 1600 MHz data rate. The ideal solution for testing these would be to use an FSB-1600 processor at memory data rates of 1600 MHz, 1333 MHz and 1066 MHz. Those data rates correspond to frequently used Intel chipset DRAM to FSB clock ratios of 2:1, 5:3, and 4:3. This should be simple!

Unfortunately, Intel doesn’t provide "every available ratio" at "every available bus speed." The company instead picks memory speeds it thinks its buyers will need and supplies only the appropriate ratios to each FSB setting.

Intel X38 Chipset Memory Ratios
FSB Data Rate 1:1 6:5 5:4 4:3 3:2 8:5 5:3 2:1
FSB-800 N/A N/A N/A N/A N/A N/A 667 800
FSB-1066 N/A N/A 667 N/A 800 N/A N/A 1066
FSB-1333 667 800 N/A N/A N/A 1066 N/A 1333
FSB-1600 800 N/A N/A 1066 N/A N/A N/A 1600

In order to choose a ratio that Intel didn’t bless for any given bus speed, builder must choose a different FSB speed and "overclock" it.

The dilemma concerns something experienced overclockers know as "Boot Straps." The chipset’s Northbridge gets its own clock, based on a ratio of FSB clock, and each Northbridge clock setting is represented by a boot strap. For example, the Northbridge to FSB ratio for FSB-800 is known as the "200 MHz Boot Strap" while the ratio for FSB-1600 is known as "400 MHz Boot Strap" based on the clock rate of the FSB. Manually setting a 400 MHz FSB clock (FSB-1600) while using the boot strap for a 200 MHz FSB clock (FSB-800) will overclock the Northbridge by 100%.

Intel X38 Chipset Memory Ratios (by "Boot Strap")
FSB Data Rate Boot Strap Memory Data Rate Memory Clock FSB Clock DRAM:FSB Ratio
FSB-800 200 DDR2-667 333 MHz 200 MHz 5:3
FSB-800 200 DDR2-800 400 MHz 200 MHz 2:1
FSB-1066 266 DDR2-667 333 MHz 266 MHz 5:4
FSB-1066 266 DDR2-800 400 MHz 266 MHz 3:2
FSB-1066 266 DDR3-1066 533 MHz 266 MHz 2:1
FSB-1333 333 DDR2-667 333 MHz 333 MHz 1:1
FSB-1333 333 DDR2-800 400 MHz 333 MHz 6:5
FSB-1333 333 DDR3-1066 533 MHz 333 MHz 8:5
FSB-1333 333 DDR3-1333 667 MHz 333 MHz 2:1
FSB-1600 400 DDR2-800 400 MHz 400 MHz 1:1
FSB-1600 400 DDR3-1066 533 MHz 400 MHz 4:3
FSB-1600 400 DDR3-1600 800 MHz 400 MHz 2:1

Notice for example that since Intel no longer supports the use of DDR2-533 (266 MHz clock speed), the company no longer provides a 1:1 ratio for its 266-MHz clocked FSB-1066. Also notice that the X38 chipset does support an FSB-1600 boot strap, but this setting does not support the 5:3 ratio needed to use it with DDR3-1333. In order to enable the 5:3 DRAM to FSB ratio, a "200 MHz Boot Strap" must be used rather than the "400 MHz Boot Strap" native to FSB-1600.

The effects of selecting the wrong boot strap cannot be over-emphasized, as neither the P35 nor X38 chipsets can be overclocked by 100%, and even if they could, it would have a noticeable impact on total system performance.

This prevented us from using several "Native DDR3-1333" modules with an FSB-1600 processor on our Gigabyte X38T-DQ6 motherboard, because the board would automatically set the 400 MHz FSB clock and 5:3 DRAM:FSB ratio, which in turn forced the lower 200- MHz boot strap at the higher 400-MHz FSB clock. The result of this 100% Northbridge overclock was a failed boot.

So we can’t recommend DDR3-1333 for use with FSB-1600 on the P35 chipset, but what about the X38? Our Asus Maximus Extreme set the correct 400 MHz boot strap, which thus eliminated the required 5:3 DRAM to FSB ratio, and all modules instead defaulted to DDR3-1066 speed.

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  • Therlian
    One part on page 3 is a bit confusing to me:

    "Because cycle time is the inverse of clock speed (1/2 of DDR data rates), the DDR-333 reference clock cycled every six nanoseconds, DDR2-667 every three nanoseconds and DDR3-1333 every 1.5 nanoseconds. Latency is measured in clock cycles, and two 6ns cycles occur in the same time as four 3ns cycles or eight 1.5ns cycles. If you still have your doubts, do the math!"

    If I am reading this right, cycle time is the inverse of (1/2)*(DDR Data Rate or 333 for example). So 1/((1/2)*333)=.006006006 which rounds to 6 milli-seconds, not 6 nano-seconds.

    Sorry for my confusion, but could someone please clarify for me?
  • uk_gangsta
    I can not clarify...this is a good article, but im still anoyed at the spelling and punctuation in the articles...Im not one for utmost spelling and punction in informall chatting messaging etc (like this) but i am when its a published article, you wouldnt find a harry potter novel with spelling mistakes in it....

    "and DDR3-1600 is called PC2-12800." Its surposed to say, PC3-12800 not...PC2-12800

    On the first page mid way down ^^^
  • danmari
    Therlian you got it wrong. Generally, period (cycle time) it's the inverse of frequency (clock speed). But as DDR stands for Dual Data Rate, its real frequency is 1/2 of the specified clock speed. What you did wrong it's that you didn't take in account that DDR-333 means a data rate of 333 MEGA-hertz. Because a hertz is the inverse of a second you get: 1/((1/2)*333 MHz)=.006 micro- seconds, which is equal to 6 nano-seconds. Hope I made it clear for you.
  • Therlian
    I see now danmari. Thanks for pointing that out. I don't know why I didn't think about the 333 being MHz as opposed to Hz.
  • Anonymous
    "I can not clarify...this is a good article, but im still anoyed at the spelling and punctuation in the articles...Im not one for utmost spelling and punction in informall chatting messaging etc (like this) but i am when its a published article, you wouldnt find a harry potter novel with spelling mistakes in it...."

    Sorry but when you make THAT many mistakes in your own post, you have no right to talk about spelling mistakes. The mistake you mention is a typo (hitting a wrong key) not a spelling error.

    You however manage to spell "annoyed", "informal", and "supposed" wrongly. You also managed to spell "punctuation" wrongly (the second time.. not sure how you can spell it right the first time and wrong the second..)

    If you don't know how to spell, then don't flame others for it.
  • Anonymous
    anyone with notes PC2100,PC3200,PC4200,PC5300?
  • skgiven
    "Intel’s current fastest Front Side Bus (FSB) uses a 1333-MHz data rate"

    No, that's not right!
    It's 1600MHz (native) for a Socket 775 CPU and socket 771, and if you didn't notice, some people overclock, big time!
  • skgiven
    Although DDR3 is touted as using 1.50V, several modules use more!
    The same is true of DDR2. In this article DDR2 is described as being 1.8V. In my experience most of the modules are 1.9V and some are higher.