Broadcom's BCM1400 SoC Chip Combines Four 1GHz Cores With Focus On High-Performance I/O

At Microprocessor Forum 2002, Broadcom announced its BCM1400 quad-core multiprocessor, focusing on the chip's high-speed buses and I/O subsystem, specifically the on-chip switch, memory bridge, packet DMA, multiprotocol ports with integrated packet managers, and cache-coherent nonuniform memory accesses. The BCM1400 doubles the theoretical processing capacity of Broadcom's previously announced dual-core BCM1250 containing four MIPS64-based SB-1 cores. The on-chip bandwidth of the BCM1400 is handled by Broadcom's proprietary 16GB/s internal ZBbus that also maintains coherency among ZBbus agents (i.e., processors, memory, and DMAs). For off-chip communications, as well as for supported coherency for interchip multiprocessing, the BCM1400 also added three 19Gb/s SPI-4/HyperTransport ports.

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