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Toshiba's 32-Bit RISC MIPS Chip

By - Source: Tom's Hardware | B 0 comment

Everyone's pushing for low power nowadays, which is understandable, since all of our mobile devices run on batteries. BTW: shouldn't all mobile devices nowadays use rechargeable power sources? It makes me cringe to think of how many AA and AAA batteries are getting tossed into landfills by folks who use portable devices - and I'm not really even that "green" or "politically correct." Toshiba is no exception in the quest for devices that give you more mobile time for each battery charge, and the company just announced a 32-bit RISC microprocessor for use in battery-powered portable devices. The TMP1942 uses a MIPS-based TX19 core that has on-chip ROM and RAM that can be accessed in a single-clock cycle. The TMP1942 integrates an analog system that is bolstered by an integrated analog-to-digital converter (ADC) and digital-to-analog converter (DAC), Wakeup Key inputs, 3/5 volt I/O port support, and increased timer channels. Toshiba is also in the process of developing an on-chip Flash memory version of the TMP1942. At 32 MHz, the processor consumes only 200 milliwatts (mW), which Toshiba thinks is a good fit for low-power applications in personal mobile devices like cameras, digital video cameras, and other handheld gadgets. The TMP1942's ADC has a 1-microsecond conversion time, and the chip's 3-channel, 10-bit precision DAC with output AMP can translate lots of analog data. The chip also features two types of ports with independent power pins. These power pins function as 5V I/O pins when a 5V power source is supplied and as 3V I/O pins when a 3V power source is supplied, and the 16-bit timer supports a two-phase pulse-input count function. It also has 14 wake-up key inputs. Along with ROM and RAM that can be accessed by a single clock, the processor integrates a 5-channel serial I/O that can be programmed for synchronous and asynchronous serial I/F, a 1-channel Fast Mode I2C to communicate with external LSI peripherals, and 12-channel, 8-bit timers and 14-channel, 16-bit timers. ROM code acceptance for the Mask ROM version of the TMP1942 (TMPR1942CYU/CYXB) is scheduled in Q2 2002. The chip will priced at $12 each for 10,000 unit quantities. The Flash version of the TMP1942 (TMPR1942FDU/FDXB) is scheduled for Q1 2002 at a price of $30 each for 10,000 unit quantities. Production of both chips is scheduled for Q3 2002. The processor is packaged in a 144-pin low quad flat pack (0.4 mm pitch) or a 177-pin chip scale package (0.8 mm pitch FBGA).

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