STM's PowerFLAT Chip-Scale Package

STMicroelectronics let us know last week about its new chip-scale package for power integrated circuits as well as six N-channel MOSFETs that take advantage of the new package. The PowerFLAT case, available in 6 x 5mm and 5 x 5mm outlines, adopts a micro-lead-frame design that replaces leads with terminal pads. Of the two outlines STM is showing off, the 6 x 5mm PowerFLAT case is pin-compatible with a standard SO-8 package but allows for 118% more die area. Both outlines have an exposed back slug that connects the MOSFET die to the printed circuit board for heat dissipation. The maximum height of the PowerFLAT is 1mm, and STM says the package reduces parasitic inductance to put forth better MOSFET performance. Using the new package are six new N-channel STM MOSFETs. Offered in the 5 x 5mm outline version are the STL22NF10, with a 100V drain-source breakdown voltage (BVDSS), 65m(ohm) typical on resistance (RDS(on)), and 22A continuous drain current (ID); the STL28NF3LL, with a V(BR)DSS of 30V, a typical RDS(on) of 5.5 m(ohm), and an ID of 28A; and the STL4NM60, with a 600V BVDSS, 1.5(ohm) RDS(on) (typical), and 4A ID. Other chips using the 6 x 5mm case include the STL30NF3LL, with a BVDSS of 30V, a typical RDS(on) of 6m(ohm), and an ID of 30A; the STL35NF10, with a 100V BVDSS, 25m(ohm) typical RDS(on), and 35A ID; and the STL35NF3LL, with a 30V BVDSS, 6m(ohm) typical RDS(on), and 35A ID. Samples are available now for the STL22NF10 and STL30NF3LL and all the other PowerFLAT MOSFETs should come to light sometime this month.

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