Samsung's 10nm DRAM Is Smaller, Faster, And Uses Less Power

Samsung is mass producing the "industry's first" 2nd-generation 10-nanometer class DRAM. The new 8Gb DDR4 die improves on the previous generation design with a 10% performance and 15% energy improvement. The new memory operates at 3,600Mb/s per pin, a 400Mb/s increase over the existing 8Gb die shipping today.

“By developing innovative technologies in DRAM circuit design and process, we have broken through what has been a major barrier for DRAM scalability,” said Gyoyoung Jin, president of Memory Business at Samsung Electronics. “Through a rapid ramp-up of the 2nd-generation 10nm-class DRAM, we will expand our overall 10nm-class DRAM production more aggressively, in order to accommodate strong market demand and continue to strengthen our business competitiveness.”

Samsung applied new technologies including the use of a high-sensitivity cell data sensing system to enable more accurate data determination to read the data stored in each cell. A new "air spacer" gap placed around the bit lines reduces parasitic capacitance. The spacer enables higher scaling and increases rapid cell operation by reducing the disturbance of different voltages in conductors placed close together.

The lessons learned with the new manufacturing process and integrated features have accelerated Samsung's plans for other memory technologies. Samsung says it will be able to bring to market DDR5, LPDDR5, HMB3, and GDDR6 earlier with these breakthroughs.

Second-generation 8Gb DDR4 modules have finished validation with CPU manufacturers, and Samsung's next step is to work closely with global IT customers. This will enable the development of more efficient next-generation computing systems.

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