Rambus technology isn't limited to RDRAM. The company is also heavy into chip connection technology, and just let us know about its low-power RaSer serial link cell, which is now being produced in the 0.13-micron process. Rambus is showing off the new RaSer serial link at DesignCon this week in Santa Clara, California. Rambus says it developed its second-generation family of cells based on serializer/deserializer (SerDes) technology. The latest RaSer cells operate from 1 to 4 gigabits per second (Gbps), while consuming less than 100 mWatts of power at 2.5 Gbps and use less than 0.5 mm of area in an 0.13-micron CMOS process. RaSer technology can be used in a variety of different networking applications, including WAN router and switch backplanes, Gigabit and 10-Gigabit Ethernet, InfiniBand, Fibre Channel, and fiber optic network interfaces and other custom chip-to-chip applications. Rambus RaSer cells are offered as an analog core library cell for ASIC and ASSP designs and contain serializer, transmitter, receiver, deserializer, and clock recovery circuitry.