Rambus Licenses RaSer Comm Chip Design to Intel

Rambus announced its RaSer Serial Link cell way back in August at the Intel Developer Forum and, admittedly, you didn't read about it here. In fact, it didn't seem like that big a deal in light of all the other stuff going on at the Forum. However, at the Rambus Developer Forum yesterday, the company was touting its benefits - along with the fact that Intel has licensed the technology for use by network communications chip designers in board and system-level apps. Rambus says that RaSer gives designers a "scalable serializer/deserializer architecture that addresses current and future serial link applications requiring the highest bandwidth" and that it can be employed across networking applications that include WAN router and switch backplanes, Gigabit and 10-Gigabit Ethernet, InfiniBand, Fibre Channel, fiber optic network interfaces, and other chip-to-chip applications. The RaSer cell supports a narrow, high-bandwidth connection of up to 30 inches in PCB length between chips and boards. It's available in single, dual and quad-channel configurations, where 1.0 to 3.125Gbps data rates are supported per channel. A Quad RaSer cell is said to drive up to 12.5Gbps bandwidth in each direction, or up to 25Gbps full-duplex bandwidth. Rambus RaSer cells are offered as an analog core library cell for ASIC and ASSP designs and contains serializer, transmitter, receiver, deserializer, and clock recovery circuitry. If you're interested in seeing how it all works, you can check out the overview on Rambus' website .