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Upgrading And Repairing PCs 21st Edition
- Chapter 3: Processor Specifications
- Chapter 3: Processor Features
- Chapter 5: BIOS
- Chapter 10: Flash And Removable Storage
- Chapter 20: PC Diagnostics, Testing, and Maintenance
Processor Features
As new processors are introduced, new features are continually added to their architectures to improve everything from performance in specific types of applications to the reliability of the CPU as a whole. The next few sections look at some of these technologies.
System Management Mode (SMM)
Spurred on initially by the need for more robust power management capabilities in mobile computers, Intel and AMD began adding System Management Mode (SMM) to its processors during the early 1990s. SMM is a special-purpose operating mode provided for handling low-level system power management and hardware control functions. SMM offers an isolated software environment that is transparent to the OS or applications software and is intended for use by system BIOS or low-level driver code.
SMM was introduced as part of the Intel 386SL mobile processor in October 1990. SMM later appeared as part of the 486SL processor in November 1992, and in the entire 486 line starting in June 1993. SMM was notably absent from the first Pentium processors when they were released in March 1993; however, SMM was included in all 75MHz and faster Pentium processors released on or after October 1994. AMD added SMM to its enhanced Am486 and K5 processors around that time as well. All other Intel and AMD x86-based processors introduced since that time also have incorporated SMM.
SMM is invoked by signaling a special interrupt pin on the processor, which generates a System Management Interrupt (SMI), the highest priority nonmaskable interrupt available. When SMM starts, the context or state of the processor and currently running programs are saved. Then the processor switches to a separate dedicated address space and executes the SMM code, which runs transparently to the interrupted program as well as any other software on the system. Once the SMM task is complete, a resume instruction restores the previously saved context or state of the processor and programs, and the processor resumes running exactly where it left off.
Although initially used mainly for power management, SMM was designed to be used by any low-level system functions that need to function independent of the OS and other software on the system. In modern systems, this includes the following:
- ACPI and APM power management function
- Universal serial bus (USB) legacy (keyboard and mouse) support
- USB boot (drive emulation)
- Password and security functions
- Thermal monitoring
- Fan speed monitoring
- Reading/writing Complementary Metal Oxide Semiconductor (CMOS) RAM
- BIOS updating
- Logging memory error-correcting code (ECC) errors
- Logging hardware errors besides memory
- Wake and Alert functions such as Wake on LAN (WOL)
One example of SMM in operation occurs when the system tries to access a peripheral device that had been previously powered down to save energy. For example, say that a program requests to read a file on a hard drive, but the drive had previously spun down to save energy. Upon access, the host adapter generates an SMI to invoke SMM. The SMM software then issues commands to spin up the drive and make it ready. Consequently, SMM returns control to the OS, and the file load continues as if the drive had been spinning all along.
- Processor Features, Explored
- Superscalar Execution
- MMX Technology: SSE And 3DNow!
- Dynamic Execution
- Dual Independant Bus Architecture
- Hyper-Threading Technology
- Multi-Core Technology
- Hardware-Assisted Virtualization Support
- Processor Socket And Slot Types
- Intel Sockets: LGA 775, LGA 1156, LGA 1366, And LGA 1155
- AMD Sockets: AM2/AM2+/AM3/AM3 And F/FM1/FM2
- CPU Operating Voltages And Math Coprocessors (Floating-Point Units)
- Processor Bugs And Steppings
- Intel Core ix-Series And Atom Processors
- AMD K10, Bulldozer, Piledriver CPUs, And Fusion/HSA APUs
Create a new thread in the UK Article comments forum about this subject
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0 HideDirk_p_broer , 31 October 2013 10:43Llano is not based upon Bulldozer, but on K10.
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0 HideDirk_p_broer , 31 October 2013 10:50See for Llano specs e.g. <a href="http://www.cpu-world.com/CPUs/K10/TYPE-A8-Series.html">CPU-World</a>
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0 HideDirk_p_broer , 11 November 2013 11:07Llano also had a triple core A6-3500, which would be impossible had they been based upon Bulldozer. That's why there's no triple core Trinity or Richland: it is impossible to make a triple core Piledriver. Intel engineers could point out at you that technically speaking they think the Trinity and Richland quads are actually dual-cores with the AMD version of hyper-threading to them -a more effective version too.
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0 HideDirk_p_broer , 2 December 2013 11:52A6-3500 has three cores, A4-5300 only has two
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0 HideDirk_p_broer , 6 December 2013 13:57Trinity is based upon Bulldozer, Richland is based upon Piledriver and Kaveri is based upon Steamroller. Carrizo will be based upon Excavator. LLano had Husky cores, based upon Phenom II.