PCIe And CrossFire Scaling: Does Nvidia's NF200 Fix P55?
Table of contents
- 1. When Does 16/2=32?
- 2. Test Settings And Boards
- 3. Benchmark Results: Crysis
- 4. Benchmark Results: Far Cry 2
- 5. Benchmark Results: Tom Clancy’s H.A.W.X.
Our recent analysis of three-card CrossFireX on P55-based motherboards demonstrated that the bandwidth restrictions of the third slot’s first-gen PCI Express (PCIe) x4 interface was the most likely cause of dramatic performance drops in some games, compared to an otherwise-identical dual-GPU configuration. The LGA 1156 interface’s native support for 16 PCIe 2.0 lanes (running at 5 Gb/s) across a maximum of two devices leaves the P55 chipset’s slow 2.5Gb pathways as the only means for hosting additional devices. Many of our forum members would label the attempts made by several manufacturers to add a third x16-length slot to LGA 1156 platforms as failures of epic proportions.
But what if the third slot didn’t have to rely on the platform controller hub to facilitate lackluster throughput? Certainly some other type of data hub could be devised to allow the processor’s 16 lanes to be divided three ways, with the equivalent bandwidth of five 5.0Gb lanes feeding each card, right? Alright, so the cards can't really operate in x5 mode. But surely an add-in device, if smart enough, could spread that bandwidth across eight lanes. Because the Lynnfield-based Core i7/i5's PCIe controller is only able to host two devices, the add-in part would have to present itself to the CPU as a single component, negotiating data traffic to any connected graphics cards using its own logic.
Fortunately these types of devices, called PCIe bridges, already exist. Nvidia has long used its nForce 200 bridge to “transform” the PCIe 1.1-equipped 680i SLI chipset into the PCIe 2.0-equipped 780i. While many of the 780i’s critics pointed to the northbridge as a bottleneck, the NF200 proved itself extremely capable of managing the bandwidth disparity.
And yet our previous CrossFire examination began with a PCIe performance analysis that showed a 4% slow-down between x16 and x8 PCIe 2.0 slots. Wouldn’t dropping to the equivalent of five lanes of bandwidth per card result in an even more dramatic performance decrease? Two motherboards that arrived for our recent Extreme Motherboard Shootout gave us the opportunity to find out.
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looks like we need new Crysis... getting over 100fps in games these days seems way too easy...
What effect does increasing the PCI-E clock from 100mhz to 200mhz on the P55 platform have? Would doubling the clock rate make up for the half bandwidth 1.1 interface over a 2.o interface?
What effect does increasing the PCI-E clock from 100mhz to 200mhz on the P55 platform have? Would doubling the clock rate make up for the half bandwidth 1.1 interface over a 2.o interface?
More likely it'd throw the graphics cards completely and not boot. you'll struggle beyond 120MHz, and even then the gains would be minimal.
Although an interesting read, I'm really not sure why motherboard manufacturers are investing so much time in "fixing" the P55's lack of PCI-E lanes.
Right now, the only thing that requires all these lanes is multiple GPU setups, and if you're a gamer who demands that level of GPU power then you obviously have the cash to burn and go top-end with X58 anyway.
It just seems to me that mobo companies are trying to fix a problem for a market that doesn't exist.
Work in progress, release then try fix is the new way for all devices and games alike. Good read was more interested in the small gains by adding a 3rd card, hopefully if, when they get 16,16,16 or 32/32/32 oh ye what a dream, will be better results, but for now it shows how limited the boards are at present.
Then again we have always been paying usualy double for those very small gains in the past.