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MPF Day Two: "Extreme" Processors

By - Source: Tom's Hardware | B 0 comment

Nick Stam of ExtremeTech is at MPF taking a look at Extreme Processors and other events from Day 2. Here's his report.

After an early morning industry panel discussion on venture capital's role in driving microprocessor development (very much an industry-insider event), Max Baron, Principal Analyst for MDR/In-Stat, kicked off the technical sessions with an insightful discussion on the "extreme" processor market. Extreme processors are often focused on data-intensive workloads, including multimedia and communications tasks, which can be partitioned across multiple processors. Max suggested extreme architectures might include a mix of general and special-purpose processing units, or possibly arrays of identical processing units. Processors presented in the extreme category at Microprocessor Forum included Micron's Yukon, a technology where a memory array has integrated processing elements that can perform parallel data processing; NEC's DRP, a dynamically reconfigurable processor architecture; Sandbridge's SandBlaster, a multithreaded compound instruction-set architecture for DSP applications; and Tensilica's FLIX, their "Flexible Length Instruction Extensions" VLIW processor design. We'll discuss a few of the interesting extreme processors below, highlighting their unique features.

Micron Yukon Array

While only a prototype technology at the moment, it's focused on exploiting the bandwidth present within memory chips. For example, a single SDRAM chip has internal data bandwidth of greater than 200 Gbits/sec, with a very wide internal data bus (thousands of bits). If efficient processor structures are build alongside the memory, without the typical large distances between processor and memory (including chipset interfaces), then incredible performance gains can be realized for certain algorithms that fit in the memory.

NEC's Dynamically Reconfigurable Processor

Possibly the most fascinating processor of the entire Microprocessor Forum, Masa Motomura from NEC presented their new DRP (dynamically reconfigurable processor), which achieves high-performance by dynamically reconfiguration itself based on the algorithm being processed at the moment, in real-time! Yes, the processor is fast enough to alter its organization in a fine-grained, time-sliced manner.

Pleny more here.

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