Mitsubishi Develops 135 GHz SOI-CMOS Technology

Mitsubishi's claim to fame this week is that it has given a new level of speed to the silicon-on-insulator (SOI) field with a new SOI-CMOS technology for RF/analog and logic applications capable of 135 GHz. The new technology enables SOI-CMOS technology to operate in the same frequency range as compound semiconductor technologies, like gallium arsenide, while reducing overall power consumption and the size of communication modules. The company also developed a system-on-chip (SOC) CMOS technology that implements surface-channel pMOSFET (SC-pMOSFET) and buried-channel pMOSFET (BC-pMOSFET) structures on the same chip without increasing lithography steps. This allows SC-pMOSFET features to be available on the same chip along with the BC-MOSFET advantages of reliability and greater noise immunity. As a result, Mitsubishi Electric engineers were able to use 1.2-volt SC-pMOSFET structures for high-performance core circuits and 3.3-volt BC-pMOSFET structures for I/O and analog circuits. Mitsubishi engineers also achieved a 10.98-dB most significant gain (MSG) at 40 GHz,. The company says that achieving oscillation frequencies of 40 GHz or higher have typically required the use of compound semiconductors, such as gallium arsenide, or bipolar devices because the operating frequency of conventional silicon MOS devices is limited to one-third to one-tenth of the maximum frequency. The researchers have made CMOS devices with more than a 100 GHz cutoff frequency by reducing the minimum gate length, but further improvements in the maximum oscillation frequency were limited by corresponding increases in parasitic resistance and capacitance. To improve the maximum oscillation frequency, they targeted reducing source-drain junction capacitance, gate-overlap capacitance, and gate resistance.