Intel to Release Details on 32nm Chip Fabrication Technology at 54th IEDM

If chip fabrication continues on a shrinking trend with Intel expected to release details surround its 32nm chip fabrication technology at the IEEE International Electron Devices Meeting (IEDM) in San Francisco on December 15.

Representatives from Intel will present a paper to discuss how they produced a 291Mb SRAM memory array to test the process – a process which uses high-k and metal gate technologies. Using a 0.171-micron^2 cell size, the device has close to 2 billion transistors and array density of 4.2-Mbit^2 – it operated at 3.8GHz at 1.1 Volts.

Static RAM cells are what chip makers always build first when testing a new fabrication process – and according to Intel, the new process appears to be good. Intel has also claimed that its first 32nm processors, codenamed ‘Westmere’ are expected to debut in late 2009 – essentially be a die-shrink version of their new Nehalem architecture, due out late this quarter.

Intel is also not the only chip maker detailing its progress, however. AMD is claiming the smallest functional SRAM cell ever made at 22nm, high-k and metal gate with a density of 0.10micron^2.

From the sounds of things, we can expect to start seeing 32nm chips from Intel around the third or fourth quarter of 2009 and 22nm chips from AMD. Generally the smaller they get, the lower the voltage – thus lowering the heat. This are going to be pretty cool next year, no pun intended.