When we spoke to Jim Carlson, HP's IA-64 chief on Friday, we also got treated to an all-star line up of engineers from its chipset division. Andrew Wheeler, who heads up the R&D at the chipset division, and Jim Brokish talked us through the new chipset design, Andrew Orlowski writes .

Real kit based on the zx1 won't appear until the summer. But the zx1 is the first detailed McKinley chipset to streak into public view.

The zx1 has an integrated I/O controller (the zx1 ioa) that handles AGP-4X, PCI and PCI-X. The memory controller (zx1 sme) talks to 200Mhz DDR, with a 4.3 GB/s throughout. There are eight I/O channels. The fourway version of the chipset uses four of these for two PCI-X 133 buses, and the remainder for PCI-X 66. The two-way version opts for an AGP bus in place of one of the PCI-X buses. The single-processor chipset divvies six channel between the AGP bus (two), the PCI-X 133 (two) and two PCI-66 buses. HP claims a slightly lower throughput of 3 GB/s for the single processor version.

Full story HP puts clear blue water between McKinley, Itanic Mk1

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