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Tom's Hardware > Forum > CPU & Components > CPUs > OpenCL double-precision in AMD APUs?

OpenCL double-precision in AMD APUs?

Forum CPU & Components : CPUs OpenCL double-precision in AMD APUs?

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Hello,

It appears the current A-series APUs only support single precision FP calculation on the integrated Graphics. I haven't found much in the way of documentation at AMD but given this hasn't changed yet, I assume it's a hardware limitation, not a software/compiler limitation.
I understand die space is valuable on a quad-core chip with a GPU but it's really a shame. SP performance in OpenCL can be remarkable on the A series.

Anyone know if..
a) there is in fact no hardware support for double-precision in the GPU section..
b) Does the next-gen Trinity APU have Double support?

With AMD APUs, AMD/ATI graphics, and Intel entering the co-processing market with MIC, there's a huge potential for OpenCL going forward and I think AMD is missing a lot of opportunity if they don't fully embrace the ability of the APU to act as a GP-GPU co-processor.

Reply to sbandyk
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I appreciate someone taking the time to reply to me but the provided link doesn't really provide any useful information. It's a press release from AMD with no real details in it.
If anyone has found any details confirming or refuting the claim the A8 APUs are incapable of double precision calculations on the integrated GPU, I'd appreciate that information.

Thank you.
Steven.

Reply to sbandyk

http://en.wikipedia.org/wiki/AMD_Fusion

Quote :

All models do not feature double-precision FP

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Reply to ElMoIsEviL

The wikipedia link is appreciated but it only lists mobile APUs. I wasn't clear in stating I was interested in the A8 3850 APUs, not the MX mobile series.

After another night searching the AMD Developer site, it does appear that doubles are not supported in the GPU in any AMD APU, and that it likely won't be a feature for a while. One commenter in the AMD forums seemed confident we'll be waiting till 2013 but I can't attest to their authority on the subject.

I've still not seen an official AMD document stating this, but the most authoritative source is an AMD employee in the forums and at this point, that's good enough for me. I'll eventually be able to verify this myself when we get some of our commodity APU compute nodes up but that's been getting pushed back by other work.

Thanks for the help.

Reply to sbandyk
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