Elpida intros power saving DRAM

Tokyo - The semiconductor company announced that it has shipped samples of a 256 Megabit DDR SDRAM that extends the battery life for portable consumer electronics by reducing self refresh current.

The memory modules integrate a proprietary Super Self Refresh (SSR) technology which is able to reduce a 95 percent reduction in self refresh current (IDD6). The power saving feature does not require a trade-off in performance, Elpida said in a statement released Thursday.

As new circuit technology, SSR replaces common self refresh functions in conventional SDRAMs. It extends the internal refresh interval by working with embedded Error Correction Circuit (ECC), which checks and corrects the data when exiting the self refresh cycle, according to the company. Using an on-chip temperature sensor known as Auto Temperature Compensated Self Refresh (ATCSR), SSR also automatically adjusts the self refresh timing to compensate for internal temperature variations.

According to Elpida, the circuit improvements of SSR allow drop IDD6 to as low as 40 micro ampere at 25 degrees. At 70 degrees, Current increases to 150 micro amperes and to 250 micro amperes at 85 degrees.

The 256 Mbit DDR samples shipped are organized as 4M x 16 bits x 4 banks, latency is rated at 2, 2.5, 3 and burst length is 2, 4, 8. The devices are JEDEC compliant and offer the standardized data rates of 400 Mbps, According to Elpida. 256 and 512 Mbit samples are shipping to manufacturers at this time, volume production of the modules is scheduled for March.