Broadcom's Single-Core MIPS Processors

Networking, wireless communications, and storage need silicon advancements every bit as much as our computers and graphics cards. Broadcom tends to lean toward broadband applications (hence its name) and just let us know about a new line of MIPS chips targeted at such apps. The new BCM112x line of products is based on the architecture of Broadcom's BCM1250, a MIPS-based dual-core System-on-Chip (SOC). The BCM112x processors, with a single CPU, integrated memory controller and input/output (I/O), scale from 400 MHz to 1 GHz with power consumption starting at less than 4 Watts. Broadcom says the new products can perform wire-speed Layer 3 processing/routing in excess of 5 million packets per second to support data rates of up to 2 Gbps. The first two new products in the BCM112x line are the BCM1125H and the BCM1125. Both devices feature the SiByte SB-1, a pipelined 64-bit MIPS CPU that scales up to 1 GHz. In addition, both integrate an on-chip 256 kB L2 cache, a Double Data Rate (DDR) memory controller that supports up to 8 Gigabytes (GB) of memory, and a variety of peripherals. The memory controller can be configured to use standard DDR SDRAM or FCRAM and provides up to 25 Gbps of peak memory bandwidth. The peripherals include two 10/100/1000 Ethernet MACs optionally configurable to one 16-bit or two 8-bit FIFO interfaces, a 32-bit 33/66 MHz PCI bridge, two serial interfaces, a generic bus for direct connection to boot flash, PCMCIA support and on-chip debug features. All functional blocks of the processor are connected by the ZBbus, a 256-bit wide internal system bus that delivers up to 128 Gbps of on-chip bus bandwidth.

The BCM1125H also offers support for HyperTransport to let you connect the it to HyperTransport devices, ASICs, FPGAs, co-processors, and HyperTransport backplanes. HyperTransport can also be used to connect two BCM1125H processors or a single BCM1125H processor to a BCM1250. The BCM112x supports 8-bit wide HyperTransport links at up to 600 MHz clock speed DDR, offering an aggregate bandwidth of 19.2 Gbps. The evaluation platform for the single core processors will be the BCM91125E, a PCI form factor evaluation board that includes firmware, operating system software and GNU-based development tools. The board makes use of the interfaces on the BCM1125H and has provisions for HyperTransport peripherals. It can be used stand-alone or as a companion board for one of the two BCM1250 evaluation platforms: BCM91250A, an ATX 2.0 compliant evaluation board, or BCM91250E, a PCI form factor evaluation board. Sample silicon of the BCM1125 and the BCM1125H as well as the BCM91125 evaluation platform will be available in the second quarter of 2002.