[IDF] Nehalem to Feature On-Die Memory Controller

The CPUs of the Nehalem family, announced for 2008, will feature an integrated memory controller as well as an optional graphics engine.

The Nehalem line of processors will debut in the second half of 2008 and will replace the Penryn processors, which are due to be released this November. Intel will also equip the next-gen family with a multi-level cache architecture. These CPUs will contain up to eight cores, with each core capable of processing two threads simultaneously. At the same time, the new design will maintain compatibility with Apple’s Mac OS X, a clear indication that Intel intends to continue its partnership with Apple.

Nehalem will be Intel’s first processor line to sport an on-die memory controller. A similar move by AMD in 2003 has allowed Intel’s smaller rival to be quite successful in the server space, where fast low-latency memory access is of great importance. On the one hand, the integrated memory controller will allow for lower thermal power dissipation, on the other it will diminish the influence of the front side bus on processor speeds. Intel is saying its good-byes to the FSB at any rate – see “IDF Keynote offers no Surprises, Fascinates Nonetheless”.